DESIGN OF LOW POWER DIGITALLY OPERATED VOLTAGE REGULATOR BY USING CMOS TECHNOLOGY

Abstract: As portable electronic devices become a part of daily life, it creates a huge market for electronic components for those battery driven devices. Low-power digitally operated (LPDO) voltage regulator is an important part that provides steady DC supplies for other components. Low power, low noise and high stability are the desired features of a regulator. Here, A Low-Power Digitally Operated (LPDO) Voltage Regulator that can operate with a very small Input-output Differential Voltage with 32nm CMOS technology has been proposed. It increases the Packing Density and provides the new approach towards power management. A voltage regulator is capable of providing 0.8V output under the supply voltage of 1.2V and the output voltage level is controlled externally by means of 2 1-bit control signals.

Keywords: Low Drop-Out, Voltage Regulator, Power management, Reduction in chip Area.